1. Field of the Invention
The present invention relates to an active matrix substrate which is used for a liquid crystal display device or the like.
2. Description of the Related Art
An active matrix substrate is widely used for active matrix display devices such as a liquid crystal display device and an EL (Electro Luminescence) display device. In an active matrix substrate which is used for a conventional active matrix liquid crystal display device, switching elements such as a TFT (thin film transistor) are provided at each of intersections of a plurality of scanning signal lines and a plurality of data signal lines, which scanning signal lines and data signal lines are provided crosswise on the substrate. According to a switching function of such a TFT or the like, image signals are appropriately transmitted to each of pixel (electrode) sections which are connected to the TFT or the like. In some active matrix substrates, a retention capacitor element is provided at each of the pixel sections in order that self-electric discharge of a liquid crystal layer which is caused while the TFT or the like is turned off or degradation of image signals because of off-current of the TFT or the like is prevented, or the retention capacitor element is used as an application path or the like for various modulating signals for driving a liquid crystal.
FIG. 17 illustrates an arrangement of a conventional active matrix substrate which is used in a liquid crystal display device. As illustrated in FIG. 17, an active matrix substrate 900 includes: a plurality of scanning signal lines 916; a plurality of data signal lines 915, which are arranged crosswise relative to the scanning signal lines 916; a TFT 912 (Thin Film Transistor) which is provided in the vicinity of an intersection of signal lines (915 and 916); and a pixel electrode 917. The TFT 912 includes: a gate electrode, which is a part of the scanning signal line 916; a source electrode 919, which is connected to the data signal line 915; and a drain electrode 908, which is connected to the pixel electrode 917 via a drain lead electrode 907. An insulating film provided between the drain lead electrode and the pixel electrode 917 has a hole, where a contact hole 910 is formed so as to connect the drain lead electrode 907 to the pixel electrode 917. The pixel electrode 917 is a transparent electrode such as an ITO, and light (back light) from a bottom of the active matrix substrate passes therethrough.
In this active matrix substrate 900, the TFT 912 is tuned on by scanning signals (gate on voltage) transmitted to the scanning signal line 916 (where the source electrode 919 is electrically connected to the drain electrode 908), and in this status, data signals (signal voltage) transmitted to the data signal line 915 are input in the pixel electrode 917 via the source electrode 919, the drain electrode 908, and the drain lead electrode 907.
An arrangement of the TFT 912 is as follows. The scanning signal line 916 (a gate electrode) is provided on a transparent insulating substrate, and a gate insulating film is arranged so as to cover the gate electrode. Moreover, a semiconductor layer is arranged on the gate insulating film so as to be overlapped with the gate electrode, and the source electrode 919 and the drain electrode 908 are arranged so as to cover a portion of the semiconductor layer.
However, in such a case where the gate insulating film is single-layered, structural defects such as a pinhole or a crack in the gate insulating film in a TFT forming region would cause a defect such as short-circuits between each of the electrodes in the TFT (short-circuits between the gate and the drain and short-circuits between the gate and the source). In order to avoid such a situation, an arrangement in which a gate insulating film is double-layered is proposed (for example, see Japanese Unexamined Patent Publication, Tokukaihei, No. 7-114044).
In such a case where the gate insulating film is double-layered, the gate insulating film between a gate electrode and a semiconductor layer becomes thick. This causes a problem such as degradation of TFT characteristics.
As a method for avoiding such a problem, Japanese Unexamined Patent Publication, Tokukaihei, No. 6-112485 discloses an arrangement in which a gate insulating layer below a semiconductor layer has a single-layer structure (a silicon nitride film), and in other parts, a gate insulating layer is provided to be a multilayer structure (a silicon oxide film and a silicon nitride film).
However, when the gate insulating layer in a TFT forming region has the single-layer structure, the gate insulating film between a source electrode and a gate electrode is thin. This may easily cause short-circuits between the source electrode and the gate electrode because of imperfect formation or the like of the gate insulating film as described above. The short-circuits between the source electrode and the gate electrode causes short-circuits between a data signal line and a scanning signal line. This is a serious defect which cannot be easily corrected.